Hi, I’m Shuaiming 👋
I’m a chip verification engineer at BYD, leading a team of 11 as the verification lead. I’ve been in the semiconductor game for 3 years, focused on digital IC verification — SystemVerilog, UVM, ARM-based MCU platforms, and building verification infrastructure that actually works.
When I’m not debugging testbenches, I’m building AI agents. I believe the future of engineering is human + AI collaboration, and I’m exploring that intersection hands-on.
What This Blog Is About
Two things drive this space:
- Technical deep-dives — Verification methodology, SystemVerilog tricks, ARM-GCC toolchains, and lessons learned from real projects. Stuff you won’t find in textbooks.
- AI & Tools — Practical guides on AI agents, terminal workflows, and developer tooling that make you faster.
This blog is my public notebook. If something I write saves you an hour of debugging, it’s done its job.
What I Do
Chip Verification Team Leadership AI Agent Development
At work: I lead verification for MCU projects at BYD — planning test strategies, building verification environments, and making sure the silicon comes out clean.
On the side: I develop AI agent applications and write about the tools I use daily — OpenClaw, Claude Code, and whatever makes the terminal feel like home.
Projects 🚀
EDA Prompt Generator — A prompt generator purpose-built for digital IC design & verification engineers. Turn a one-line EDA requirement into a structured, professional prompt — tuned for RTL design, functional verification, synthesis & STA, physical design, DFT, and CDC/RDC, and adapted for ChatGPT, Claude, DeepSeek, Doubao, or Qwen. Docs · Read the writeup →